267 lines
13 KiB
C
267 lines
13 KiB
C
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//###########################################################################
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//
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// FILE: F2837xD_eqep.h
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//
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// TITLE: Definitions for the EQEP registers.
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//
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//###########################################################################
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//
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// $Release Date: $
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// $Copyright:
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// Copyright (C) 2013-2022 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef F2837xD_EQEP_H
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#define F2837xD_EQEP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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//---------------------------------------------------------------------------
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// EQEP Individual Register Bit Definitions:
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struct QDECCTL_BITS { // bits description
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Uint16 rsvd1:5; // 4:0 Reserved
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Uint16 QSP:1; // 5 QEPS input polarity
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Uint16 QIP:1; // 6 QEPI input polarity
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Uint16 QBP:1; // 7 QEPB input polarity
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Uint16 QAP:1; // 8 QEPA input polarity
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Uint16 IGATE:1; // 9 Index pulse gating option
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Uint16 SWAP:1; // 10 CLK/DIR Signal Source for Position Counter
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Uint16 XCR:1; // 11 External Clock Rate
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Uint16 SPSEL:1; // 12 Sync output pin selection
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Uint16 SOEN:1; // 13 Sync output-enable
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Uint16 QSRC:2; // 15:14 Position-counter source selection
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};
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union QDECCTL_REG {
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Uint16 all;
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struct QDECCTL_BITS bit;
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};
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struct QEPCTL_BITS { // bits description
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Uint16 WDE:1; // 0 QEP watchdog enable
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Uint16 UTE:1; // 1 QEP unit timer enable
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Uint16 QCLM:1; // 2 QEP capture latch mode
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Uint16 QPEN:1; // 3 Quadrature postotion counter enable
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Uint16 IEL:2; // 5:4 Index event latch
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Uint16 SEL:1; // 6 Strobe event latch
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Uint16 SWI:1; // 7 Software init position counter
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Uint16 IEI:2; // 9:8 Index event init of position count
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Uint16 SEI:2; // 11:10 Strobe event init
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Uint16 PCRM:2; // 13:12 Postion counter reset
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Uint16 FREE_SOFT:2; // 15:14 Emulation mode
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};
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union QEPCTL_REG {
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Uint16 all;
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struct QEPCTL_BITS bit;
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};
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struct QCAPCTL_BITS { // bits description
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Uint16 UPPS:4; // 3:0 Unit position event prescaler
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Uint16 CCPS:3; // 6:4 eQEP capture timer clock prescaler
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Uint16 rsvd1:8; // 14:7 Reserved
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Uint16 CEN:1; // 15 Enable eQEP capture
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};
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union QCAPCTL_REG {
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Uint16 all;
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struct QCAPCTL_BITS bit;
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};
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struct QPOSCTL_BITS { // bits description
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Uint16 PCSPW:12; // 11:0 Position compare sync pulse width
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Uint16 PCE:1; // 12 Position compare enable/disable
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Uint16 PCPOL:1; // 13 Polarity of sync output
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Uint16 PCLOAD:1; // 14 Position compare of shadow load
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Uint16 PCSHDW:1; // 15 Position compare of shadow enable
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};
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union QPOSCTL_REG {
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Uint16 all;
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struct QPOSCTL_BITS bit;
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};
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struct QEINT_BITS { // bits description
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Uint16 rsvd1:1; // 0 Reserved
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Uint16 PCE:1; // 1 Position counter error interrupt enable
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Uint16 QPE:1; // 2 Quadrature phase error interrupt enable
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Uint16 QDC:1; // 3 Quadrature direction change interrupt enable
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Uint16 WTO:1; // 4 Watchdog time out interrupt enable
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Uint16 PCU:1; // 5 Position counter underflow interrupt enable
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Uint16 PCO:1; // 6 Position counter overflow interrupt enable
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Uint16 PCR:1; // 7 Position-compare ready interrupt enable
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Uint16 PCM:1; // 8 Position-compare match interrupt enable
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Uint16 SEL:1; // 9 Strobe event latch interrupt enable
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Uint16 IEL:1; // 10 Index event latch interrupt enable
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Uint16 UTO:1; // 11 Unit time out interrupt enable
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Uint16 rsvd2:4; // 15:12 Reserved
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};
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union QEINT_REG {
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Uint16 all;
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struct QEINT_BITS bit;
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};
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struct QFLG_BITS { // bits description
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Uint16 INT:1; // 0 Global interrupt status flag
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Uint16 PCE:1; // 1 Position counter error interrupt flag
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Uint16 PHE:1; // 2 Quadrature phase error interrupt flag
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Uint16 QDC:1; // 3 Quadrature direction change interrupt flag
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Uint16 WTO:1; // 4 Watchdog timeout interrupt flag
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Uint16 PCU:1; // 5 Position counter underflow interrupt flag
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Uint16 PCO:1; // 6 Position counter overflow interrupt flag
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Uint16 PCR:1; // 7 Position-compare ready interrupt flag
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Uint16 PCM:1; // 8 eQEP compare match event interrupt flag
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Uint16 SEL:1; // 9 Strobe event latch interrupt flag
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Uint16 IEL:1; // 10 Index event latch interrupt flag
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Uint16 UTO:1; // 11 Unit time out interrupt flag
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Uint16 rsvd1:4; // 15:12 Reserved
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};
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union QFLG_REG {
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Uint16 all;
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struct QFLG_BITS bit;
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};
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struct QCLR_BITS { // bits description
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Uint16 INT:1; // 0 Global interrupt clear flag
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Uint16 PCE:1; // 1 Clear position counter error interrupt flag
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Uint16 PHE:1; // 2 Clear quadrature phase error interrupt flag
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Uint16 QDC:1; // 3 Clear quadrature direction change interrupt flag
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Uint16 WTO:1; // 4 Clear watchdog timeout interrupt flag
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Uint16 PCU:1; // 5 Clear position counter underflow interrupt flag
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Uint16 PCO:1; // 6 Clear position counter overflow interrupt flag
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Uint16 PCR:1; // 7 Clear position-compare ready interrupt flag
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Uint16 PCM:1; // 8 Clear eQEP compare match event interrupt flag
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Uint16 SEL:1; // 9 Clear strobe event latch interrupt flag
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Uint16 IEL:1; // 10 Clear index event latch interrupt flag
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Uint16 UTO:1; // 11 Clear unit time out interrupt flag
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Uint16 rsvd1:4; // 15:12 Reserved
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};
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union QCLR_REG {
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Uint16 all;
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struct QCLR_BITS bit;
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};
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struct QFRC_BITS { // bits description
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Uint16 rsvd1:1; // 0 Reserved
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Uint16 PCE:1; // 1 Force position counter error interrupt
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Uint16 PHE:1; // 2 Force quadrature phase error interrupt
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Uint16 QDC:1; // 3 Force quadrature direction change interrupt
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Uint16 WTO:1; // 4 Force watchdog time out interrupt
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Uint16 PCU:1; // 5 Force position counter underflow interrupt
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Uint16 PCO:1; // 6 Force position counter overflow interrupt
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Uint16 PCR:1; // 7 Force position-compare ready interrupt
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Uint16 PCM:1; // 8 Force position-compare match interrupt
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Uint16 SEL:1; // 9 Force strobe event latch interrupt
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Uint16 IEL:1; // 10 Force index event latch interrupt
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Uint16 UTO:1; // 11 Force unit time out interrupt
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Uint16 rsvd2:4; // 15:12 Reserved
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};
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union QFRC_REG {
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Uint16 all;
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struct QFRC_BITS bit;
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};
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struct QEPSTS_BITS { // bits description
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Uint16 PCEF:1; // 0 Position counter error flag.
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Uint16 FIMF:1; // 1 First index marker flag
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Uint16 CDEF:1; // 2 Capture direction error flag
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Uint16 COEF:1; // 3 Capture overflow error flag
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Uint16 QDLF:1; // 4 eQEP direction latch flag
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Uint16 QDF:1; // 5 Quadrature direction flag
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Uint16 FIDF:1; // 6 The first index marker
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Uint16 UPEVNT:1; // 7 Unit position event flag
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Uint16 rsvd1:8; // 15:8 Reserved
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};
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union QEPSTS_REG {
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Uint16 all;
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struct QEPSTS_BITS bit;
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};
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struct EQEP_REGS {
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Uint32 QPOSCNT; // Position Counter
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Uint32 QPOSINIT; // Position Counter Init
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Uint32 QPOSMAX; // Maximum Position Count
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Uint32 QPOSCMP; // Position Compare
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Uint32 QPOSILAT; // Index Position Latch
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Uint32 QPOSSLAT; // Strobe Position Latch
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Uint32 QPOSLAT; // Position Latch
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Uint32 QUTMR; // QEP Unit Timer
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Uint32 QUPRD; // QEP Unit Period
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Uint16 QWDTMR; // QEP Watchdog Timer
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Uint16 QWDPRD; // QEP Watchdog Period
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union QDECCTL_REG QDECCTL; // Quadrature Decoder Control
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union QEPCTL_REG QEPCTL; // QEP Control
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union QCAPCTL_REG QCAPCTL; // Qaudrature Capture Control
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union QPOSCTL_REG QPOSCTL; // Position Compare Control
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union QEINT_REG QEINT; // QEP Interrupt Control
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union QFLG_REG QFLG; // QEP Interrupt Flag
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union QCLR_REG QCLR; // QEP Interrupt Clear
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union QFRC_REG QFRC; // QEP Interrupt Force
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union QEPSTS_REG QEPSTS; // QEP Status
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Uint16 QCTMR; // QEP Capture Timer
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Uint16 QCPRD; // QEP Capture Period
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Uint16 QCTMRLAT; // QEP Capture Latch
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Uint16 QCPRDLAT; // QEP Capture Period Latch
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};
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//---------------------------------------------------------------------------
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// EQEP External References & Function Declarations:
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//
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#ifdef CPU1
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extern volatile struct EQEP_REGS EQep1Regs;
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extern volatile struct EQEP_REGS EQep2Regs;
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extern volatile struct EQEP_REGS EQep3Regs;
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#endif
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#ifdef CPU2
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extern volatile struct EQEP_REGS EQep1Regs;
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extern volatile struct EQEP_REGS EQep2Regs;
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extern volatile struct EQEP_REGS EQep3Regs;
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#endif
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif
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//===========================================================================
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// End of file.
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//===========================================================================
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