534 lines
22 KiB
C
534 lines
22 KiB
C
//###########################################################################
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//
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// FILE: F2837xD_sdfm.h
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//
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// TITLE: Definitions for the SDFM registers.
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//
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//###########################################################################
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//
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// $Release Date: $
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// $Copyright:
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// Copyright (C) 2013-2022 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef F2837xD_SDFM_H
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#define F2837xD_SDFM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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//---------------------------------------------------------------------------
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// SDFM Individual Register Bit Definitions:
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struct SDIFLG_BITS { // bits description
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Uint16 IFH1:1; // 0 High-level Interrupt flag Filter 1
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Uint16 IFL1:1; // 1 Low-Level Interrupt flag Filter 1
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Uint16 IFH2:1; // 2 High-level Interrupt flag Filter 2
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Uint16 IFL2:1; // 3 Low-Level Interrupt flag Filter 2
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Uint16 IFH3:1; // 4 High-level Interrupt flag Filter 3
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Uint16 IFL3:1; // 5 Low-Level Interrupt flag Filter 3
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Uint16 IFH4:1; // 6 High-level Interrupt flag Filter 4
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Uint16 IFL4:1; // 7 Low-Level Interrupt flag Filter 4
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Uint16 MF1:1; // 8 Modulator Failure for Filter 1
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Uint16 MF2:1; // 9 Modulator Failure for Filter 2
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Uint16 MF3:1; // 10 Modulator Failure for Filter 3
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Uint16 MF4:1; // 11 Modulator Failure for Filter 4
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Uint16 AF1:1; // 12 Acknowledge flag for Filter 1
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Uint16 AF2:1; // 13 Acknowledge flag for Filter 2
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Uint16 AF3:1; // 14 Acknowledge flag for Filter 3
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Uint16 AF4:1; // 15 Acknowledge flag for Filter 4
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Uint16 rsvd1:15; // 30:16 Reserved
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Uint16 MIF:1; // 31 Master Interrupt Flag
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};
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union SDIFLG_REG {
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Uint32 all;
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struct SDIFLG_BITS bit;
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};
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struct SDIFLGCLR_BITS { // bits description
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Uint16 IFH1:1; // 0 High-level Interrupt flag Filter 1
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Uint16 IFL1:1; // 1 Low-Level Interrupt flag Filter 1
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Uint16 IFH2:1; // 2 High-level Interrupt flag Filter 2
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Uint16 IFL2:1; // 3 Low-Level Interrupt flag Filter 2
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Uint16 IFH3:1; // 4 High-level Interrupt flag Filter 3
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Uint16 IFL3:1; // 5 Low-Level Interrupt flag Filter 3
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Uint16 IFH4:1; // 6 High-level Interrupt flag Filter 4
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Uint16 IFL4:1; // 7 Low-Level Interrupt flag Filter 4
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Uint16 MF1:1; // 8 Modulator Failure for Filter 1
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Uint16 MF2:1; // 9 Modulator Failure for Filter 2
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Uint16 MF3:1; // 10 Modulator Failure for Filter 3
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Uint16 MF4:1; // 11 Modulator Failure for Filter 4
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Uint16 AF1:1; // 12 Acknowledge flag for Filter 1
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Uint16 AF2:1; // 13 Acknowledge flag for Filter 2
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Uint16 AF3:1; // 14 Acknowledge flag for Filter 3
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Uint16 AF4:1; // 15 Acknowledge flag for Filter 4
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Uint16 rsvd1:15; // 30:16 Reserved
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Uint16 MIF:1; // 31 Master Interrupt Flag
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};
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union SDIFLGCLR_REG {
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Uint32 all;
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struct SDIFLGCLR_BITS bit;
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};
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struct SDCTL_BITS { // bits description
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Uint16 rsvd1:13; // 12:0 Reserved
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Uint16 MIE:1; // 13 Master Interrupt enable
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Uint16 rsvd2:1; // 14 Reserved
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Uint16 rsvd3:1; // 15 Reserved
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};
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union SDCTL_REG {
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Uint16 all;
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struct SDCTL_BITS bit;
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};
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struct SDMFILEN_BITS { // bits description
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Uint16 rsvd1:4; // 3:0 Reserved
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Uint16 rsvd2:3; // 6:4 Reserved
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Uint16 rsvd3:2; // 8:7 Reserved
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Uint16 rsvd4:1; // 9 Reserved
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Uint16 rsvd5:1; // 10 Reserved
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Uint16 MFE:1; // 11 Master Filter Enable.
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Uint16 rsvd6:1; // 12 Reserved
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Uint16 rsvd7:3; // 15:13 Reserved
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};
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union SDMFILEN_REG {
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Uint16 all;
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struct SDMFILEN_BITS bit;
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};
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struct SDCTLPARM1_BITS { // bits description
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Uint16 MOD:2; // 1:0 Delta-Sigma Modulator mode
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Uint16 rsvd1:1; // 2 Reserved
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Uint16 rsvd2:1; // 3 Reserved
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Uint16 rsvd3:1; // 4 Reserved
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Uint16 rsvd4:11; // 15:5 Reserved
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};
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union SDCTLPARM1_REG {
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Uint16 all;
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struct SDCTLPARM1_BITS bit;
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};
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struct SDDFPARM1_BITS { // bits description
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Uint16 DOSR:8; // 7:0 Data Filter Oversample Ratio= DOSR+1
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Uint16 FEN:1; // 8 Filter Enable
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Uint16 AE:1; // 9 Ack Enable
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Uint16 SST:2; // 11:10 Data Filter Structure (DataFast/1/2/3)
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Uint16 SDSYNCEN:1; // 12 Data FILTER Reset Enable
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Uint16 rsvd1:3; // 15:13 Reserved
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};
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union SDDFPARM1_REG {
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Uint16 all;
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struct SDDFPARM1_BITS bit;
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};
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struct SDDPARM1_BITS { // bits description
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Uint16 rsvd1:7; // 6:0 Reserved
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Uint16 rsvd2:1; // 7 Reserved
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Uint16 rsvd3:1; // 8 Reserved
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Uint16 rsvd4:1; // 9 Reserved
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Uint16 DR:1; // 10 Data Representation (0/1 = 16/32b 2's complement)
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Uint16 SH:5; // 15:11 Shift Control (# bits to shift in 16b mode)
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};
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union SDDPARM1_REG {
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Uint16 all;
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struct SDDPARM1_BITS bit;
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};
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struct SDCMPH1_BITS { // bits description
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Uint16 HLT:15; // 14:0 High-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPH1_REG {
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Uint16 all;
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struct SDCMPH1_BITS bit;
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};
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struct SDCMPL1_BITS { // bits description
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Uint16 LLT:15; // 14:0 Low-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPL1_REG {
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Uint16 all;
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struct SDCMPL1_BITS bit;
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};
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struct SDCPARM1_BITS { // bits description
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Uint16 COSR:5; // 4:0 Comparator Oversample Ratio = COSR + 1
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Uint16 IEH:1; // 5 High-level interrupt enable
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Uint16 IEL:1; // 6 Low-level interrupt enable
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Uint16 CS1_CS0:2; // 8:7 Comparator filter structure (Sincfast/Sinc1/Sinc2/Sinc3
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Uint16 MFIE:1; // 9 Modulator Failure Interrupt enable
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Uint16 rsvd1:6; // 15:10 Reserved
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};
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union SDCPARM1_REG {
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Uint16 all;
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struct SDCPARM1_BITS bit;
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};
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struct SDDATA1_BITS { // bits description
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Uint16 DATA16:16; // 15:0 16-bit Data in 16b mode, Lo-order 16b in 32b mode
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Uint16 DATA32HI:16; // 31:16 Hi-order 16b in 32b mode
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};
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union SDDATA1_REG {
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Uint32 all;
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struct SDDATA1_BITS bit;
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};
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struct SDCTLPARM2_BITS { // bits description
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Uint16 MOD:2; // 1:0 Delta-Sigma Modulator mode
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Uint16 rsvd1:1; // 2 Reserved
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Uint16 rsvd2:1; // 3 Reserved
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Uint16 rsvd3:1; // 4 Reserved
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Uint16 rsvd4:11; // 15:5 Reserved
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};
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union SDCTLPARM2_REG {
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Uint16 all;
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struct SDCTLPARM2_BITS bit;
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};
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struct SDDFPARM2_BITS { // bits description
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Uint16 DOSR:8; // 7:0 Data Filter Oversample Ratio= DOSR+1
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Uint16 FEN:1; // 8 Filter Enable
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Uint16 AE:1; // 9 Ack Enable
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Uint16 SST:2; // 11:10 Data Filter Structure (SincFast/1/2/3)
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Uint16 SDSYNCEN:1; // 12 Data FILTER Reset Enable
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Uint16 rsvd1:3; // 15:13 Reserved
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};
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union SDDFPARM2_REG {
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Uint16 all;
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struct SDDFPARM2_BITS bit;
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};
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struct SDDPARM2_BITS { // bits description
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Uint16 rsvd1:7; // 6:0 Reserved
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Uint16 rsvd2:1; // 7 Reserved
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Uint16 rsvd3:1; // 8 Reserved
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Uint16 rsvd4:1; // 9 Reserved
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Uint16 DR:1; // 10 Data Representation (0/1 = 16/32b 2's complement)
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Uint16 SH:5; // 15:11 Shift Control (# bits to shift in 16b mode)
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};
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union SDDPARM2_REG {
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Uint16 all;
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struct SDDPARM2_BITS bit;
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};
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struct SDCMPH2_BITS { // bits description
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Uint16 HLT:15; // 14:0 High-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPH2_REG {
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Uint16 all;
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struct SDCMPH2_BITS bit;
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};
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struct SDCMPL2_BITS { // bits description
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Uint16 LLT:15; // 14:0 Low-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPL2_REG {
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Uint16 all;
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struct SDCMPL2_BITS bit;
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};
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struct SDCPARM2_BITS { // bits description
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Uint16 COSR:5; // 4:0 Comparator Oversample Ratio = COSR + 1
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Uint16 IEH:1; // 5 High-level interrupt enable
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Uint16 IEL:1; // 6 Low-level interrupt enable
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Uint16 CS1_CS0:2; // 8:7 Comparator filter structure (Sincfast/Sinc1/Sinc2/Sinc3
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Uint16 MFIE:1; // 9 Modulator Failure Interrupt enable
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Uint16 rsvd1:6; // 15:10 Reserved
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};
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union SDCPARM2_REG {
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Uint16 all;
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struct SDCPARM2_BITS bit;
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};
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struct SDDATA2_BITS { // bits description
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Uint16 DATA16:16; // 15:0 16-bit Data in 16b mode, Lo-order 16b in 32b mode
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Uint16 DATA32HI:16; // 31:16 Hi-order 16b in 32b mode
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};
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union SDDATA2_REG {
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Uint32 all;
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struct SDDATA2_BITS bit;
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};
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struct SDCTLPARM3_BITS { // bits description
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Uint16 MOD:2; // 1:0 Delta-Sigma Modulator mode
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Uint16 rsvd1:1; // 2 Reserved
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Uint16 rsvd2:1; // 3 Reserved
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Uint16 rsvd3:1; // 4 Reserved
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Uint16 rsvd4:11; // 15:5 Reserved
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};
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union SDCTLPARM3_REG {
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Uint16 all;
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struct SDCTLPARM3_BITS bit;
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};
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struct SDDFPARM3_BITS { // bits description
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Uint16 DOSR:8; // 7:0 Data Filter Oversample Ratio= DOSR+1
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Uint16 FEN:1; // 8 Filter Enable
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Uint16 AE:1; // 9 Ack Enable
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Uint16 SST:2; // 11:10 Data filter structure (SincFast/1/2/3)
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Uint16 SDSYNCEN:1; // 12 Data FILTER Reset Enable
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Uint16 rsvd1:3; // 15:13 Reserved
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};
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union SDDFPARM3_REG {
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Uint16 all;
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struct SDDFPARM3_BITS bit;
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};
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struct SDDPARM3_BITS { // bits description
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Uint16 rsvd1:7; // 6:0 Reserved
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Uint16 rsvd2:1; // 7 Reserved
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Uint16 rsvd3:1; // 8 Reserved
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Uint16 rsvd4:1; // 9 Reserved
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Uint16 DR:1; // 10 Data Representation (0/1 = 16/32b 2's complement)
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Uint16 SH:5; // 15:11 Shift Control (# bits to shift in 16b mode)
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};
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union SDDPARM3_REG {
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Uint16 all;
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struct SDDPARM3_BITS bit;
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};
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struct SDCMPH3_BITS { // bits description
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Uint16 HLT:15; // 14:0 High-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPH3_REG {
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Uint16 all;
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struct SDCMPH3_BITS bit;
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};
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struct SDCMPL3_BITS { // bits description
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Uint16 LLT:15; // 14:0 Low-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPL3_REG {
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Uint16 all;
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struct SDCMPL3_BITS bit;
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};
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struct SDCPARM3_BITS { // bits description
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Uint16 COSR:5; // 4:0 Comparator Oversample Ratio = COSR + 1
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Uint16 IEH:1; // 5 High-level interrupt enable
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Uint16 IEL:1; // 6 Low-level interrupt enable
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Uint16 CS1_CS0:2; // 8:7 Comparator filter structure (Sincfast/Sinc1/Sinc2/Sinc3
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Uint16 MFIE:1; // 9 Modulator Failure Interrupt enable
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Uint16 rsvd1:6; // 15:10 Reserved
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};
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union SDCPARM3_REG {
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Uint16 all;
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struct SDCPARM3_BITS bit;
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};
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struct SDDATA3_BITS { // bits description
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Uint16 DATA16:16; // 15:0 16-bit Data in 16b mode, Lo-order 16b in 32b mode
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Uint16 DATA32HI:16; // 31:16 Hi-order 16b in 32b mode
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};
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union SDDATA3_REG {
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Uint32 all;
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struct SDDATA3_BITS bit;
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};
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struct SDCTLPARM4_BITS { // bits description
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Uint16 MOD:2; // 1:0 Delta-Sigma Modulator mode
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Uint16 rsvd1:1; // 2 Reserved
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Uint16 rsvd2:1; // 3 Reserved
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Uint16 rsvd3:1; // 4 Reserved
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Uint16 rsvd4:11; // 15:5 Reserved
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};
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union SDCTLPARM4_REG {
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Uint16 all;
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struct SDCTLPARM4_BITS bit;
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};
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struct SDDFPARM4_BITS { // bits description
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Uint16 DOSR:8; // 7:0 SINC Filter Oversample Ratio= DOSR+1
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Uint16 FEN:1; // 8 Filter Enable
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Uint16 AE:1; // 9 Ack Enable
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Uint16 SST:2; // 11:10 Data filter structure (SincFast/1/2/3)
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Uint16 SDSYNCEN:1; // 12 SINC FILTER Reset Enable
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Uint16 rsvd1:3; // 15:13 Reserved
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};
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union SDDFPARM4_REG {
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Uint16 all;
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struct SDDFPARM4_BITS bit;
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};
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struct SDDPARM4_BITS { // bits description
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Uint16 rsvd1:7; // 6:0 Reserved
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Uint16 rsvd2:1; // 7 Reserved
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Uint16 rsvd3:1; // 8 Reserved
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Uint16 rsvd4:1; // 9 Reserved
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Uint16 DR:1; // 10 Data Representation (0/1 = 16/32b 2's complement)
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Uint16 SH:5; // 15:11 Shift Control (# bits to shift in 16b mode)
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};
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union SDDPARM4_REG {
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Uint16 all;
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struct SDDPARM4_BITS bit;
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};
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struct SDCMPH4_BITS { // bits description
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Uint16 HLT:15; // 14:0 High-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPH4_REG {
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Uint16 all;
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struct SDCMPH4_BITS bit;
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};
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struct SDCMPL4_BITS { // bits description
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Uint16 LLT:15; // 14:0 Low-level threshold for the comparator filter output.
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Uint16 rsvd1:1; // 15 Reserved
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};
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union SDCMPL4_REG {
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Uint16 all;
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struct SDCMPL4_BITS bit;
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};
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struct SDCPARM4_BITS { // bits description
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Uint16 COSR:5; // 4:0 Comparator Oversample Ratio = COSR + 1
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Uint16 IEH:1; // 5 High-level interrupt enable
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Uint16 IEL:1; // 6 Low-level interrupt enable
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Uint16 CS1_CS0:2; // 8:7 Comparator filter structure (Sincfast/Sinc1/Sinc2/Sinc3
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Uint16 MFIE:1; // 9 Modulator Failure Interrupt enable
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Uint16 rsvd1:6; // 15:10 Reserved
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};
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union SDCPARM4_REG {
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Uint16 all;
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struct SDCPARM4_BITS bit;
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};
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struct SDDATA4_BITS { // bits description
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Uint16 DATA16:16; // 15:0 16-bit Data in 16b mode, Lo-order 16b in 32b mode
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Uint16 DATA32HI:16; // 31:16 Hi-order 16b in 32b mode
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};
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union SDDATA4_REG {
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Uint32 all;
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struct SDDATA4_BITS bit;
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};
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struct SDFM_REGS {
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union SDIFLG_REG SDIFLG; // Interrupt Flag Register
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union SDIFLGCLR_REG SDIFLGCLR; // Interrupt Flag Clear Register
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union SDCTL_REG SDCTL; // SD Control Register
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Uint16 rsvd1; // Reserved
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union SDMFILEN_REG SDMFILEN; // SD Master Filter Enable
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Uint16 rsvd2[9]; // Reserved
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union SDCTLPARM1_REG SDCTLPARM1; // Control Parameter Register for Ch1
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union SDDFPARM1_REG SDDFPARM1; // Data Filter Parameter Register for Ch1
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union SDDPARM1_REG SDDPARM1; // Integer Parameter Register for Ch1
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union SDCMPH1_REG SDCMPH1; // High-level Threshold Register for Ch1
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union SDCMPL1_REG SDCMPL1; // Low-level Threshold Register for Ch1
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union SDCPARM1_REG SDCPARM1; // Comparator Parameter Register for Ch1
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union SDDATA1_REG SDDATA1; // Filter Data Register (16 or 32bit) for Ch1
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Uint16 rsvd3[8]; // Reserved
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union SDCTLPARM2_REG SDCTLPARM2; // Control Parameter Register for Ch2
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union SDDFPARM2_REG SDDFPARM2; // Data Filter Parameter Register for Ch2
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union SDDPARM2_REG SDDPARM2; // Integer Parameter Register for Ch2
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union SDCMPH2_REG SDCMPH2; // High-level Threshold Register for Ch2
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union SDCMPL2_REG SDCMPL2; // Low-level Threshold Register for Ch2
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union SDCPARM2_REG SDCPARM2; // Comparator Parameter Register for Ch2
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union SDDATA2_REG SDDATA2; // Filter Data Register (16 or 32bit) for Ch2
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Uint16 rsvd4[8]; // Reserved
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union SDCTLPARM3_REG SDCTLPARM3; // Control Parameter Register for Ch3
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union SDDFPARM3_REG SDDFPARM3; // Data Filter Parameter Register for Ch3
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union SDDPARM3_REG SDDPARM3; // Integer Parameter Register for Ch3
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union SDCMPH3_REG SDCMPH3; // High-level Threshold Register for Ch3
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union SDCMPL3_REG SDCMPL3; // Low-level Threshold Register for Ch3
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union SDCPARM3_REG SDCPARM3; // Comparator Parameter Register for Ch3
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union SDDATA3_REG SDDATA3; // Filter Data Register (16 or 32bit) for Ch3
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Uint16 rsvd5[8]; // Reserved
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union SDCTLPARM4_REG SDCTLPARM4; // Control Parameter Register for Ch4
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union SDDFPARM4_REG SDDFPARM4; // Data Filter Parameter Register for Ch4
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union SDDPARM4_REG SDDPARM4; // Integer Parameter Register for Ch4
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union SDCMPH4_REG SDCMPH4; // High-level Threshold Register for Ch4
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union SDCMPL4_REG SDCMPL4; // Low-level Threshold Register for Ch4
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union SDCPARM4_REG SDCPARM4; // Comparator Parameter Register for Ch4
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union SDDATA4_REG SDDATA4; // Filter Data Register (16 or 32bit) for Ch4
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};
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//---------------------------------------------------------------------------
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// SDFM External References & Function Declarations:
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//
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#ifdef CPU1
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extern volatile struct SDFM_REGS Sdfm1Regs;
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extern volatile struct SDFM_REGS Sdfm2Regs;
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#endif
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#ifdef CPU2
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extern volatile struct SDFM_REGS Sdfm1Regs;
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extern volatile struct SDFM_REGS Sdfm2Regs;
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#endif
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif
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//===========================================================================
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// End of file.
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//===========================================================================
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