144 lines
7.2 KiB
C
144 lines
7.2 KiB
C
//###########################################################################
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//
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// FILE: hw_asysctl.h
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//
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// TITLE: Definitions for the ASYSCTL registers.
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//
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//###########################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef HW_ASYSCTL_H
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#define HW_ASYSCTL_H
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//*************************************************************************************************
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//
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// The following are defines for the ASYSCTL register offsets
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//
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//*************************************************************************************************
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#define ASYSCTL_O_INTOSC1TRIM 0x20U // Internal Oscillator 1 Trim Register
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#define ASYSCTL_O_INTOSC2TRIM 0x22U // Internal Oscillator 2 Trim Register
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#define ASYSCTL_O_TSNSCTL 0x26U // Temperature Sensor Control Register
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#define ASYSCTL_O_LOCK 0x2EU // Lock Register
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#define ASYSCTL_O_ANAREFTRIMA 0x36U // Analog Reference Trim A Register
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#define ASYSCTL_O_ANAREFTRIMB 0x38U // Analog Reference Trim B Register
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#define ASYSCTL_O_ANAREFTRIMC 0x3AU // Analog Reference Trim C Register
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#define ASYSCTL_O_ANAREFTRIMD 0x3CU // Analog Reference Trim D Register
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the INTOSC1TRIM register
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//
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//*************************************************************************************************
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#define ASYSCTL_INTOSC1TRIM_VALFINETRIM_S 0U
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#define ASYSCTL_INTOSC1TRIM_VALFINETRIM_M 0xFFFU // Oscillator Value Fine Trim Bits
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the INTOSC2TRIM register
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//
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//*************************************************************************************************
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#define ASYSCTL_INTOSC2TRIM_VALFINETRIM_S 0U
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#define ASYSCTL_INTOSC2TRIM_VALFINETRIM_M 0xFFFU // Oscillator Value Fine Trim Bits
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the TSNSCTL register
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//
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//*************************************************************************************************
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#define ASYSCTL_TSNSCTL_ENABLE 0x1U // Temperature Sensor Enable
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the LOCK register
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//
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//*************************************************************************************************
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#define ASYSCTL_LOCK_TSNSCTL 0x8U // Temperature Sensor Control Register Lock
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#define ASYSCTL_LOCK_ANAREFTRIMA 0x800000U // Analog Reference A Trim Register Lock
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#define ASYSCTL_LOCK_ANAREFTRIMB 0x1000000U // Analog Reference B Trim Register Lock
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#define ASYSCTL_LOCK_ANAREFTRIMC 0x2000000U // Analog Reference C Trim Register Lock
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#define ASYSCTL_LOCK_ANAREFTRIMD 0x4000000U // Analog Reference D Trim Register Lock
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the ANAREFTRIMA register
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//
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//*************************************************************************************************
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#define ASYSCTL_ANAREFTRIMA_BGVALTRIM_S 0U
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#define ASYSCTL_ANAREFTRIMA_BGVALTRIM_M 0x3FU // Bandgap Value Trim
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#define ASYSCTL_ANAREFTRIMA_BGSLOPETRIM_S 6U
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#define ASYSCTL_ANAREFTRIMA_BGSLOPETRIM_M 0x7C0U // Bandgap Slope Trim
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#define ASYSCTL_ANAREFTRIMA_IREFTRIM_S 11U
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#define ASYSCTL_ANAREFTRIMA_IREFTRIM_M 0xF800U // Reference Current Trim
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the ANAREFTRIMB register
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//
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//*************************************************************************************************
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#define ASYSCTL_ANAREFTRIMB_BGVALTRIM_S 0U
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#define ASYSCTL_ANAREFTRIMB_BGVALTRIM_M 0x3FU // Bandgap Value Trim
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#define ASYSCTL_ANAREFTRIMB_BGSLOPETRIM_S 6U
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#define ASYSCTL_ANAREFTRIMB_BGSLOPETRIM_M 0x7C0U // Bandgap Slope Trim
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#define ASYSCTL_ANAREFTRIMB_IREFTRIM_S 11U
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#define ASYSCTL_ANAREFTRIMB_IREFTRIM_M 0xF800U // Reference Current Trim
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the ANAREFTRIMC register
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//
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//*************************************************************************************************
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#define ASYSCTL_ANAREFTRIMC_BGVALTRIM_S 0U
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#define ASYSCTL_ANAREFTRIMC_BGVALTRIM_M 0x3FU // Bandgap Value Trim
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#define ASYSCTL_ANAREFTRIMC_BGSLOPETRIM_S 6U
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#define ASYSCTL_ANAREFTRIMC_BGSLOPETRIM_M 0x7C0U // Bandgap Slope Trim
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#define ASYSCTL_ANAREFTRIMC_IREFTRIM_S 11U
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#define ASYSCTL_ANAREFTRIMC_IREFTRIM_M 0xF800U // Reference Current Trim
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the ANAREFTRIMD register
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//
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//*************************************************************************************************
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#define ASYSCTL_ANAREFTRIMD_BGVALTRIM_S 0U
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#define ASYSCTL_ANAREFTRIMD_BGVALTRIM_M 0x3FU // Bandgap Value Trim
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#define ASYSCTL_ANAREFTRIMD_BGSLOPETRIM_S 6U
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#define ASYSCTL_ANAREFTRIMD_BGSLOPETRIM_M 0x7C0U // Bandgap Slope Trim
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#define ASYSCTL_ANAREFTRIMD_IREFTRIM_S 11U
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#define ASYSCTL_ANAREFTRIMD_IREFTRIM_M 0xF800U // Reference Current Trim
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#endif
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