107 lines
4.7 KiB
C
107 lines
4.7 KiB
C
//###########################################################################
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//
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// FILE: hw_xint.h
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//
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// TITLE: Definitions for the XINT registers.
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//
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//###########################################################################
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// $Copyright:
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// Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef HW_XINT_H
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#define HW_XINT_H
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//*************************************************************************************************
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//
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// The following are defines for the XINT register offsets
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//
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//*************************************************************************************************
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#define XINT_O_1CR 0x0U // XINT1 configuration register
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#define XINT_O_2CR 0x1U // XINT2 configuration register
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#define XINT_O_3CR 0x2U // XINT3 configuration register
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#define XINT_O_4CR 0x3U // XINT4 configuration register
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#define XINT_O_5CR 0x4U // XINT5 configuration register
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#define XINT_O_1CTR 0x8U // XINT1 counter register
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#define XINT_O_2CTR 0x9U // XINT2 counter register
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#define XINT_O_3CTR 0xAU // XINT3 counter register
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the XINT1CR register
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//
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//*************************************************************************************************
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#define XINT_1CR_ENABLE 0x1U // XINT1 Enable
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#define XINT_1CR_POLARITY_S 2U
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#define XINT_1CR_POLARITY_M 0xCU // XINT1 Polarity
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the XINT2CR register
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//
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//*************************************************************************************************
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#define XINT_2CR_ENABLE 0x1U // XINT2 Enable
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#define XINT_2CR_POLARITY_S 2U
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#define XINT_2CR_POLARITY_M 0xCU // XINT2 Polarity
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the XINT3CR register
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//
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//*************************************************************************************************
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#define XINT_3CR_ENABLE 0x1U // XINT3 Enable
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#define XINT_3CR_POLARITY_S 2U
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#define XINT_3CR_POLARITY_M 0xCU // XINT3 Polarity
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the XINT4CR register
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//
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//*************************************************************************************************
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#define XINT_4CR_ENABLE 0x1U // XINT4 Enable
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#define XINT_4CR_POLARITY_S 2U
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#define XINT_4CR_POLARITY_M 0xCU // XINT4 Polarity
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//*************************************************************************************************
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//
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// The following are defines for the bit fields in the XINT5CR register
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//
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//*************************************************************************************************
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#define XINT_5CR_ENABLE 0x1U // XINT5 Enable
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#define XINT_5CR_POLARITY_S 2U
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#define XINT_5CR_POLARITY_M 0xCU // XINT5 Polarity
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#endif
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